Single Electron Devices and Circuits Design
60 Seiten; 220 mm x 150 mm
Sprache English
2012 LAP Lambert Academic Publishing
ISBN 978-3-8454-2892-5
Besprechung
This comprehensive contains text covering basics of Single Electron Transistor. It provides analysis of Single Electron Transistor (SET) and SET based logic design. The text dealt in this book develops some important techniques of full adder design with SET as a basic building block instead of CMOS or other logic. The techniques discussed proves better results in terms of voltage gain and other parameters.
Biografische Anmerkung zu den Verfassern
Jatav, Hamendra SinghHamendra Singh Jatav was born on 16th January 1988 in Lahar district Bhind MP India. He did his B. E. in Electronics Engineering from MITS Gwalior in 2010 and M. Tech. in VLSI Design from ABV-IIITM Gwalior (An autonomous institute established by Ministry of HRD, Govt. of India) in 2012. He is working as a lecturer in JUET Guna, India.